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CVD Graphene on Silicon Substrate

CVD Graphene on Silicon Substrate

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Product Details:

  • Other Names CVD Graphene Film on Si/SiO2
  • Ph Level Neutral
  • Smell Odorless
  • Storage Keep in dry, clean environment, room temperature
  • Form Solid film on substrate
  • Poisonous Yes
  • HS Code 38180090
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CVD Graphene on Silicon Substrate Product Specifications

  • Single-layer or Few-layer CVD Graphene on Si/SiO2 wafer
  • Odorless
  • CVD Graphene Film on Si/SiO2
  • Neutral
  • Solid film on substrate
  • Keep in dry, clean environment, room temperature
  • Above 3600C (graphene itself, silicon substrate melts at 1414C)
  • Electronics, optoelectronics, sensors, flexible devices, R&D
  • 1034343-98-0 (Graphene)
  • Material research, device fabrication
  • Yes
  • Graphene layer: 12.01 g/mol per carbon atom
  • 38180090
  • Graphene on Silicon Substrate
  • C (Graphene), Si (Substrate)
  • Thin film on circular wafer
  • Approx. 2.6 (graphene optical index)
  • 0.77 Gram per cubic centimeter(g/cm3)
  • Hexagonal (sp2-bonded carbon atoms, layered on single-crystal silicon)
  • Insoluble in water and most solvents
  • Research grade
  • 2D nanomaterial on semiconductor substrate
  • Custom (per order request, common substrate: Si/SiO2 300nm)
  • Graphene (CVD grown), Silicon substrate
  • >99%

CVD Graphene on Silicon Substrate Trade Information

  • Paypal, Telegraphic Transfer (T/T), Cash in Advance (CID), Cheque, Cash Advance (CA)
  • All India

Product Description

Details

CVD Graphene On Silicon Substrate

NCZ-GSW-0017

Purity

> 99.9%

Graphene Film


Hall Electron Mobility on SiO2/Si

 4000 cm2/Vs

Sheet Resistance

 45040 /sq (1cm x1cm)

PRODUCT DETAIL

PREPARATION METHOD:

  • Copper-based graphene is prepared by CVD method.

  • Graphene is transferred from copper to silicon substrate.

SILICON WAFER:

Wafer Thickness:

525 m, (customization is possible)

Resistivity:

<0.01 ohm-cm

Type/Dopant:

P/N

Orientation:

<100> (customization is possible)

Front Surface:

Polished

Back Surface:

Etched





Exceptional Quality & Uniformity

Our CVD graphene films achieve high crystal quality, uniformity, and low defect density, confirmed via Raman spectroscopy (2D/G>1.5, D/G<0.1). Minimal cracks and wrinkles are validated using AFM/SEM analysis, ensuring reliable performance for advanced research and device fabrication.


Flexible Customization Options

Choose from single- or few-layer graphene, standard (~300nm) or custom oxide thickness, and wafer diameters ranging from 2-inch to 6-inch to match your specific research or industrial needs. PMMA-assisted transfer enables integration with a variety of experimental setups and device architectures.


Suitable for Diverse Applications

This research-grade material supports cutting-edge work in electronics, optoelectronics, sensors, and flexible devices. Its near-complete transparency, high electrical mobility, and robust mechanical properties make it ideal for both academic and commercial R&D.

FAQs of CVD Graphene on Silicon Substrate:


Q: How is the graphene layer transferred onto the silicon substrate?

A: The graphene is initially grown on copper foil using thermal chemical vapor deposition (CVD) with methane as the carbon source. It is then transferred onto a Si/SiO2 substrate using an optimized PMMA-assisted wet or dry transfer process, which ensures continuity and minimizes defects like cracks and wrinkles.

Q: What are the available wafer sizes and oxide thicknesses for this product?

A: We offer circular wafers in standard diameters of 2-inch, 3-inch, 4-inch, and 6-inch. The typical oxide layer (SiO2) thickness is ~300 nm, but custom thicknesses are available upon request to suit your experimental or fabrication needs.

Q: When should I use single-layer versus multi-layer graphene?

A: Single-layer graphene provides maximum transparency and electrical mobility, making it ideal for high-performance electronics and optoelectronics. Multi-layer (15 layers) graphene is suitable for applications requiring enhanced mechanical strength or specific electronic characteristics. Selection depends on your target device or research requirements.

Q: Where should the graphene on silicon substrate be stored?

A: It is recommended to keep the graphene wafers in a dry, clean environment at room temperature. Each wafer is vacuum sealed in a protective container to prevent contamination and preserve material quality during storage and transport.

Q: What benefits does this CVD graphene provide for device fabrication?

A: This material offers high uniformity, minimal defect density (<1000/cm), superior electrical mobility (up to 8000cm/Vs), excellent transparency (~97.7%), and low surface roughness (~1nm), which collectively enable reliable microfabrication and device integration for advanced electronics and sensor applications.

Q: Can you explain the graphene films defect density and characterization methods?

A: Defect density in our graphene films is typically less than 1000/cm, verified by Raman spectroscopy (D/G ratio <0.1, 2D/G >1.5 for single layer). Additionally, AFM and SEM imaging confirm film continuity and surface quality, ensuring the material meets rigorous research-grade standards.

Q: What applications are suitable for this graphene on silicon substrate?

A: Applications include electronics, optoelectronics, sensors, flexible devices, and advanced material research. The combination of high purity graphene and silicon substrate enables integration into R&D prototyping, device fabrication, and commercial-scale innovation projects.

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